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Assumptions Used in Digital Abstraction

In order to analyze and design digital circuits, a number of assumptions are made that underlie digital abstraction. It’s assumed that a circuit behaves in a ideal manner, allowing a designer to think in terms of 1s and 0s, without being concerned about the circuit’s electrical behavior and physical implementation.

There are five assumptions occasionally being made:

  1. All signals take on appropriate low and high voltages (their logic levels) representing discrete values 0 and 1. It imposes the physical circuit must not violate voltage level specifications in terms of component’s voltage threshold: VoH, VoL, ViH, ViL and noise margin;
  2. The current loads on circuit components are reasonable. An idealized component should be able to source or sink as much current at the output as its load requires without affecting the logic levels. It imposes the physical circuit must meet the static loading constraints in terms of component’s static load currents: IoH, IoL, IiH and IiL;
  3. All signals change between logic levels instantaneously. Due to component’s capacitive loading, the physical circuit must meet the propagation delay constraints when logic changes in terms of tpd;
  4. Wires are perfect conductors that propagate signals with no delay which means a change in the value of a signal at the output of a component is seen instantaneously at the input of other connected components. It imposes the circuit must guarantee its signal integrity due to parasitic load in wires;
  5. In a sequential circuit, a flip-flop stores the value of its data input at the moment the clock input changes (either edge-triggered or level-triggered) and the stored value is reflected on the output instantaneously. It imposes the circuit must meet timing constraint.
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